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Truth Table of Logic Operation
The FAN3111 truth table indicates the operational states
using the dual-input configuration. In a non-inverting
driver configuration, the IN- pin should be a logic low
signal. If the IN- pin is connected to logic high, a disable
function is realized, and the driver output remains low
regardless of the state of the IN+ pin.
Table 1. FAN3111 Truth Table
Thermal Guidelines
Gate drivers used to switch MOSFETs and IGBTs at
high frequencies can dissipate significant amounts of
power. It is important to determine the driver power
dissipation and the resulting junction temperature in the
application to ensure that the part is operating within
acceptable temperature limits.
The total power dissipation in a gate driver is the sum of
three components; P GATE , P QUIESCENT , and P DYNAMIC :
IN+
IN-
OUT
P total = P gate + P Dynamic
(1)
0
0
1
0
1
0
0
0
1
Gate Driving Loss: The most significant power loss
results from supplying gate current (charge per unit
time) to switch the load MOSFET on and off at the
1 1 0
In the non-inverting driver configuration in Figure 41, the
IN- pin is tied to ground and the input signal (PWM) is
applied to the IN+ pin. The IN- pin can be connected to
logic high to disable the driver and the output remains
low, regardless of the state of the IN+ pin.
VDD
switching frequency. The power dissipation that results
from driving a MOSFET at a specified gate-source
voltage, V GS , with gate charge, Q G , at switching
frequency, f SW , is determined by:
P GATE = Q G ? V GS ? f sw (2)
Dynamic Pre-drive / Shoot-through Current: A power loss
resulting from internal current consumption under
dynamic operating conditions, including pin pull-up / pull-
down resistors, can be obtained using the graphs in
PWM
IN+
IN-
FAN3111
OUT
Figure 11 and Figure 12 in Typical Performance
Characteristics to determine the current I DYNAMIC drawn
from V DD under actual operating conditions:
P DYNAMIC = I DYNAMIC ? V DD (3)
GND
Once the power dissipated in the driver is determined,
the driver junction temperature rise with respect to the
device lead can be evaluated using thermal equation:
Figure 41. Dual-Input Driver Enabled, Non-
Inverting Configuration
In the inverting driver application shown in Figure 42, the
T J = P TOTAL Θ JL + T C
where:
T J = driver junction temperature;
θ JL = thermal resistance from junction to lead; and
T L = lead temperature of device in application.
(4)
IN+ pin is tied high. Pulling the IN+ pin to GND forces the
output low, regardless of the state of the IN- pin.
VDD
The power dissipated in a gate-drive circuit is
independent of the drive-circuit resistance and is split
proportionately among the resistances present in the
driver, any discrete series resistor present, and the gate
resistance internal to the power switching MOSFET.
Power dissipated in the driver may be estimated using
the following equation:
R OUT, Driver
?
P PKG = P TOTAL ?
? R OUT, DRIVER + R EXT + R GATE, FET ?
PWM
Figure 42.
IN+ OUT
FAN3111
IN-
GND
Dual-Input Driver Enabled, Inverting
Configuration
? ?
(5)
? ?
where:
P PKG = power dissipated in the driver package;
R OUT,DRIVER = estimated driver impedance derived from
I OUT vs. V OUT waveforms;
R EXT = external series resistance connected between
the driver output and the gate of the MOSFET; and
R GATE,FET = resistance internal to the load MOSFET gate
and source connections.
? 2008 Fairchild Semiconductor Corporation
FAN3111 ? Rev. 1.0.3
14
www.fairchildsemi.com
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